Evaluating Xilinx SEU Controller Macro for Fault Injection



This paper presents a preliminary evaluation of the SEU Controller Macro, a VHDL component developed by Xilinx for the detection and recovery of single event upsets, as a
building block of an FPGA fault-injector. We found that this SEU Controller Macro is extremely effective for injecting faults into the FPGA configuration memory, as single and double bitflips, with precise location, virtually no intrusiveness, and coarse timing accuracy. We present some clues on how to extend its functionalities to build a fully-fledge FPGA fault injector.


fault injection, FPGA, SEU, embedded systems


FPGA fault injection


The 43rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2013), June 2013

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Year 2019 : 1 citations

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Year 2016 : 1 citations

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